UVVM/UVVM

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/

VHDL467 stars119 forksApache-2.0

Momentum

UVVM/UVVM has 467 GitHub stars. It gained +1 stars over 1 recorded day in the last 30 days (snapshots through Nov 9, 2026).

Its biggest recent day was Oct 27, 2026, with +1 stars.

It currently ranks #12309 daily, #6864 weekly, #8871 monthly by momentum on Trending Repos; its best-ever rank is #4785.

Trending Repos first recorded it on Oct 26, 2026.

Rankings

PeriodRankScore

Daily

#123090.0

Weekly

#68640.0

Monthly

#88710.1

How scoring works

Engagement

Total stars

Daily new stars

Recent daily star gains
Date	Stars gained	Total stars	Forks gained
Oct 27, 2026	+1	467	0

Embeds

Best rank #4785

Format

Markdown

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