Verilog/SystemVerilog support for VS Code
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PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
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Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
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Verilog HDL files
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GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
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