Find trending repositories by name or description.
An inference chip design that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 0.56 tok/s measured, a 140× climb, full evidence trail.
UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
:seedling: Open source ecosystem for open FPGA boards
pyrpl turns your RedPitaya into a powerful DSP device, especially suitable as a lockbox in quantum optics experiments.
A huge VHDL library for FPGA and digital ASIC development
A utility for Composing FPGA designs from Peripherals
Build Customized FPGA Implementations for Vivado
Run Time for AIE and FPGA based platforms
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
iCESugar FPGA Board (base on iCE40UP5k)
Source-verified BIOS and firmware packs for RetroArch, Batocera, Recalbox, Lakka, RetroPie, EmuDeck, RetroBat, RetroDECK, RomM, BizHawk, ROCKNIX, and MiSTer FPGA. Platform-native verification, with emulator source code as the deciding authority.
FPGA verilog and firmware for TKey, the flexible and open USB security key 🔑
Open-source FPGA retro emulation handheld
FPGA exercise for beginners
Open Logic FPGA Standard Library
Amiga Minimig ported to the Tang Nano 20k FPGA
Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.
A simple companion for MiSTer-FPGA
Agent skill for Verilog-2001 RTL generation and FPGA design workflows.
Full Transformer into a custom chip. microGPT in RTL, generating names on a Virtex-5 FPGA at ~56k tokens/second.