Icarus Verilog
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14 results for “verilog”
RankRepository7 daysStars24h gainScore
Verilog/SystemVerilog support for VS Code
7 daysStars38024h gain-Score0.0
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
7 daysStars49124h gain-Score0.0
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
7 daysStars2.6k24h gain+1Score0.0
SystemVerilog to Verilog conversion
7 daysStars74924h gain-Score0.0
A C++ to Verilog translation tool with some basic guarantees that your code will work.
7 daysStars18024h gain-Score0.0
Verilog Configurable Cache
7 daysStars20024h gain-Score0.0
A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
7 daysStars50024h gain-Score0.0
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
7 daysStars17024h gain-Score0.0
Verilog HDL files
7 daysStars18924h gain-Score0.0
FPGA verilog and firmware for TKey, the flexible and open USB security key 🔑
7 daysStars44524h gain-Score0.0
AXI, AXI stream, Ethernet, and PCIe components in System Verilog
7 daysStars88124h gain-Score0.0
A Verilog implementation of Fast Polynomial Multiplier (FPM) using Number Theoretic Transform.
7 daysStars16524h gain-Score0.0
Agent skill for Verilog-2001 RTL generation and FPGA design workflows.
7 daysStars18724h gain-Score0.0